The device features plenty of performance headroom to support higher data rate standards and emerging multifunction wireless applications. In fact, the IP3023 has been proven to deliver up to three times the performance of comparable ARM- and MIPS-based SOC solutions, and to match the performance of processors that are significantly more expensive.

The IP3023 has been designed from the ground up for the unique requirements of wireless networking and packet processing. Techniques such as eight-way multithreading, zero-cycle context switching and a memory-to-memory architecture deliver the necessary performance, reduced cost and size required by wireless applications.

Eight-way multithreading allows the device to effectively operate as eight separate processors. Each thread can be assigned a variable percentage of the overall processing power of the chip (250MIPS at 250MHz) in increments of 1.5 percent. As many as six threads can be dedicated to software I/O. In addition, the use of a memory-to-memory architecture allows direct manipulation of packets in on-chip memory at full speed, eliminating the need for caches. This not only reduces silicon cost, but eliminates the performance loss that results from cache misses.

Memory-to-memory also optimizes code and data storage, eliminating the need for costly off-chip memory. These capabilities allow the IP3023 to deliver wire-speed performance in one-fourth the silicon area, while also eliminating over 90 percent of the off-chip memory that is needed to support traditional processor architectures and general-purpose operating systems.

If you are interested in more information about the Card Access Mini AP call Ray at 801-492-4750 ext 10 or email us at sales@cardaccess-inc.com.